PCB Simulation and Analysis

Signal Integrity, Power Integrity, EMC

A complete PCB simulation and analysis environment

CR-8000 includes fully integrated SI / PI simulation and analysis tools to verify all aspects of your single or multi-board designs

During circuit design, Design Gateway provides embedded simulation, analysis and electrical rules checking.

During PCB layout, Design Force provides embedded power and signal integrity analysis and electromagnetic interference checks.

Electromagnetic compatibility tools provide a single environment for all of your design team’s simulation and analysis requirements

Signal Integrity Simulation

Topology Planning and Constraining

  • Constraining and topology planning in pre-layout phase
  • Impedance planning with integrated field solver using lossy interconnect models

Signal Integrity Analysis

  • Fast interactive time domain simulation for precise timing, reflection, and crosstalk analysis
  • Consider IBIS Buffer models
  • Use SPICE and S-parameter based models in time-domain
  • Inspect automatic timing, skew, and signal integrity measurement results
  • Optimize topology by use of parameter sweeps
  • Evaluate crosstalk in coupled topologies and scenarios
  • Explore the impact of manufacturing tolerances and material properties on the signal integrity behaviour
  • Utilize comprehensive signal integrity simulation library model management

Eye Pattern Analysis

  • Time-domain Eye Pattern Analysis for parallel busses and serial links
  • Inspect Setup and Hold timing
  • Define Eye Masks and measure against them


  • Time Domain Reflectometry for interconnect optimization
  • Drive TDR-Analysis with different speed levels
  • Inspect TDR impedances for single line and differential pair interconnects
  • Consider feed-in/out lines

S-Parameter Analysis

  • Wideband S-Parameter calculation for interconnect optimization up to 15 GHz
  • Inspect Mixed-mode S-Parameters
  • Export S-Parameters to Touchstone files
  • Enforce causality where needed

IBIS AMI Analysis

  • AMI simulation for gigabit SERDES channel optimization
  • Characterize serial links (S-Parameter, Transfer function, Impulse response)
  • Consider various types of Jitter (TX and RX)
  • Easy-to-use parameterization of AMI models
  • Inspect time-domain waveforms
  • Visualize Eye Pattern and Bathtub curves
  • Measure Eye Openings
  • Calculate Bit Error Ratio (BER)

EMI and Power Integrity Analysis

EMI Analysis

  • Full board, fast und efficient EMI screening tool identifying major EMI sources
  • Evaluate common mode and differential mode emissions
  • Visualize I/O crosstalk regions
  • Consider various antenna mechanisms

Power Integrity Analysis (AC)

  • Wideband PI-Analysis of supply systems up to 15 GHz
  • Detect and visualize high AC-impedance regions in supply systems, exploring root causes of resonances
  • Evaluate Decap efficiency and mounting inductances, visualize Decap impedances
  • Define virtual Decaps for what-if scenarios
  • Optimize decoupling strategies, identifying “fear”-Decaps

Power Integrity Analysis (DC)

  • DC-Analysis of supply systems identifying voltage drops and high current load regions
  • Visualize DC-current and -voltage distribution
  • Identify insufficient supply voltages at IC power pins
  • Identify stressed Vias under high DC-current load
  • Extract DC-resistances between power pins
  • Drive supply system with alternative voltage sources for what-if’s

Related Resources

  • Webinar
September 14, 2020
EMC for PCB Designers

In this presentation, an EMC minded PCB design approach is presented, allowing designers to understand which EMC rules will apply to PCB projects and how EMC analysis capabilities can be utilized in the CAD flow to reduce the risk of EMC compliance failure once the board is manufactured.

Read now
  • Webinar
July 06, 2020
Practical Signal Integrity for improved EMI Control in PCB Design

In our webinar we will provide an introduction to the challenges of signal integrity and the underlying physical effects. This will provide the basis for practical tips to address the related challenges during PCB design.

  • Case Study
June 30, 2020

ONTEC faced a difficult challenge: develop a multimedia broadcasting product while complying with a customer’s electromagnetic interference requirements, all within a tight development schedule. ONTEC used Zuken’s CR-8000 with Keysight’s ADS (including SiPro) to meet the requirements of the challenge

Read now
ONTEC uses CR-8000 to develop a next-generation product in less time despite rigorous design constraints
  • Webinar
November 15, 2019
How to be First to Market with DDR5!

DDR5 is the latest generation of memory. In this joint webinar with Keysight Technologies, we’ll begin with pre-layout simulation, then transition to CR-8000. The design will then be verified by Electromagnetic (EM) simulation and system simulations in Keysight ADS, in order to build confidence in the final DDR5 design.

  • Blog
July 11, 2019
How to Calculate Trace Length from Time Delay Value for High-speed Signals

To keep a good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers. One of the most challenging issues is managing the propagation delay and relative time delay mismatches. Let me take you through the process...

Read now
  • Blog
June 27, 2019
Who’s afraid of DDR4?

What IC designers do to help us route high-speed PCBs

Read now

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