System Level Design, Simulation & Analysis

Design Gateway: An engineering platform which brings extensive design, simulation and analysis capabilities to your desktop.

It allows companies to manage and make optimal use of engineering design data across all company and team sites. Intelligent multi-board design is inherently supported in Design Gateway.

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How does it work?

Design Gateway provides complete system circuit engineering. Native and interactive integration with a wide range of signal integrity (SI), analog, digital, and multi-technology verification tools is provided. Through this it also supports the co-simulation of analog and digital functional blocks and programmable devices. Design Gateway enables design re-use, allowing engineers to use proven and tested logical circuits from previous projects.

  • Central constraint management – means no errors or rework as all rules and constraints are stored and accessed from one location.
  • Embedded simulation, analysis and electrical rules checking enables early detection of design errors before they propagate.
  • Design reuse – from an existing reuse library or known-good circuits from existing designs
  • Reduce component research time with component browsing to identify existing approved components and vendors. Improves component reuse and purchasing power.
  • Initiate system-level circuit design from System Planner and exchange circuit information at any point in the design process


System level design


Demonstration Movie


Evaluating signal continuity across a product level schematic

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Additional Options

Circuit Adviser – Advanced electrical rule checks

Circuit Adviser enables engineers to conduct advanced electrical rule checks concurrently during logical circuit creation. Users specify rules and conditions, create check results, cross-probe results with the design and generate summary reports.

Circuit DR Navi – Engineering knowledge base and design checklist

Circuit DR-Navi helps design teams consolidate engineering expertise and best practices into a central knowledge base  integrated with the design process. During logical circuit design, engineers can access a standard set of requirements or create project-specific instructions to create a structured checklist to drive design guidelines across the PCB design flow.

Graphical Pin Manager – FPGA/PCB co-design environment

Graphical Pin Manager (GPM), offers an effective FPGA/PCB co-design environment providing support for the latest devices offered by FPGA vendors, such as Xilinx, Altera, Lattice, and Microsemi.

As part of the CR-8000 family, GPM enables design teams to communicate I/O and constraint information intelligently for FPGAs or other high-pin count devices, at any time, using Design Gateway and Design Force. This means programmable devices can be developed in parallel to the PCB design, and are ready to meet project delivery and production schedules.

Design Gateway - On-demand webinar

View our 30 minute on-demand webinar for more details and a demonstration of Design Gateway.