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August 20, 2020
Exploring What’s New in CR-8000 2020
What drives the features that are added or updated in a new release? The majority of the changes or additions in any Zuken tool release are customer-driven. Our customers provide valuable insight into emerging technologies, process and methodology changes, and the direction in which their EDA needs are taking them. This post focuses on the high points of the CR-8000 2020 release.
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- Blog
Oktober 17, 2019
Be First to Market with DDR5!
Double Data Rate 5 (DDR5) is the next-generation standard for random-access memory (RAM). The new specification promises to bring chips that have much higher performance than the existing DDR4 modules, as well as lower power consumption. Let us show you how you can be first to market with DDR5!
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- Blog
Juli 11, 2019
How to Calculate Trace Length from Time Delay Value for High-speed Signals
To keep a good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers. One of the most challenging issues is managing the propagation delay and relative time delay mismatches. Let me take you through the process...
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- Blog
Juni 27, 2019
Who’s afraid of DDR4?
What IC designers do to help us route high-speed PCBs
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- Blog
Juni 13, 2019
Get to Know Your SPICEs
PCB designers typically have little or no experience with SPICE applications. No worries, follow along with me and get to know your SPICEs!
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- Blog
Februar 28, 2019
Inside Signal Integrity: Impedance Control - Part 2
In part 1 of this blog we took a back-to-basics approach and discussed line impedance and its effects in signal integrity. As every electrical conductor comprises capacitance, an inductance, and a frequency-dependent ohmic resistance, and with increasing frequencies, these electrical characteristics will influence and distort the signal.
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- Blog
Februar 21, 2019
Inside Signal Integrity: Impedance Control - Part 1
Impedance and impedance control belong to the oldest and most often discussed topics in PCB design. They are especially important with the high-speed design when related to signal integrity. In this, the first of a two-part blog, we’ll go back to the basics of impedance/impedance control and consider what influences line impedance. In part two, we’ll set about controlling it.
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- Blog
August 16, 2018
What You Really Need to Know When You're Routing PCB Differential Pairs
Tips for when routing differential pairs - You can tell when something isn’t as clear as it should be. The same questions come up time and again. You ask three experts and get three different answers. Routing differential pairs can be like that. Why? Because “it depends” - on exactly what signals those pairs are carrying and what kind of PCB you’re creating.
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You can tell when something isn’t as clear as it should be. The same questions come up time and again. You ask three experts and get three diffe...
- Blog
August 29, 2017
A Few Thoughts on Avoiding DDR4 Layout Problems
DDR4, the fourth generation of DDR SDRAM technology, is the latest and greatest SDRAM standard and will continue to be until the fifth generation is released. The new standard features a point-to-point architecture that offers superior timing margins.
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This new approach makes it much easier to, for example, swap pins between banks, to achieve better length control.
- Blog
Januar 19, 2017
Using Vias to Maintain PCB Signal Integrity Featuring High-Speeds in a 3D Environment
This is the second in my series of blog posts looking at the challenge of maintaining PCB signal integrity with now-common ultra-high speeds and growing adoption of PCB design environments to design in true 3-D. Today I focus on vias and the use of return vias to overcome the issues highlighted in Part 1.
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This is the second in my series of blog posts looking at the challenge of maintaining PCB signal integrity with now-common ultra-high speeds and g...
- Blog
Januar 12, 2017
The High-Speed Design Challenge of Maintaining PCB Signal Integrity in a 3D Design Environment
Ultra-high signal speeds demand detailed consideration of the third dimension in PCB design, including via structures and layer stacks. Today I’m going to focus on the challenge. In my two subsequent posts I’ll be reviewing what PCB designers can do to meet that challenge.
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Ultra-high signal speeds demand detailed consideration of the third dimension in PCB design, including via structures and layer stacks. Today I’...
- Blog
August 20, 2013
Defining and Routing PCB Constraints for DDR3 Memory Circuits: How-to Movies
As Zuken technology partners, we are often asked about how best to set PCB constraints for double-data-rate (DDR) memory, and how to route to those constraints. This question arose recently when we were asked to create a common style of DDR3 design for training, and we tried mining the web for detailed information on PCB constraints. There had to be something out there, we thought.
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As Zuken technology partners, we are often asked about how best to set PCB constraints for double-data-rate (DDR) memory, and how to route to thos...
- Blog
November 09, 2010
S-Parameters: Microwave goes Mainstream for High-Speed PCB Design Part 2
Last week I introduced you to the concept of S-Parameters, and now I’m going to explain a bit more about measuring them and simulating with S-Parameter models.
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Last week I introduced you to the concept of S-Parameters, and now I’m going to explain a bit more about measuring them and simulating with S-Pa...