Calculate Trace Length from Time Delay Value for High-speed Signals

How to Calculate Trace Length from Time Delay Value for High-speed Signals

To keep a good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers. One of the most challenging issues is managing the propagation delay and relative time delay mismatches. To manage the time delays in PCB design, we need to know how to calculate trace length from time delay value in order to implement the PCB trace routing accordingly. Let me take you through the process…

Calculating signal speed on a PCB

According to physics, electromagnetic signals travel in a vacuum or through the air at the same speed as light, which is:

Vc = 3 x 108M/sec = 186,000 miles/second = 11.8 inch/nanosecond

A signal travels on a PCB transmission line at a slower speed, affected by the dielectric constant (Er) of the PCB material. The transmission line structure also affects the signal speed.

There are two general PCB trace structures [note*]: stripline and microstrip.

The formulas for calculating the signal speed on a PCB are given below:



  • Vcis the velocity of light in a vacuum or through the air
  • Er is the dielectric constant of the PCB material
  • Ereffis the effective dielectric constant for microstrips; its value lies between 1 and Er, and is approximately given by:

Ereff≈(0.64 Er+ 0.36)     (1c)

With those formulas, we know that the speed of signals on a PCB is less than the signal speed through the air. If Er≈4 (like for FR4 material types), then the speed of signals on a stripline is half that of the speed through the air, i.e., it is about 6 in/ns.

How to calculate propagation delay (tpd)

The propagation delay is the time a signal takes to propagate over a unit length of the transmission line.

Here is how we can calculate the propagation delay from the trace length and vice versa:

Formula - How to calculate propagation delayWhere:
  • Vis the signal speed in the transmission line

In a vacuum or through the air, it equals 85 picoseconds/inch (ps/in).

On PCB transmission lines, the propagation delay is given by:

Formula - Calculating PCB signal speed on striplines and microstrips

Case study: Calculating trace length on a PCB

In order to be compliant with the specification of JEDEC, the maximum skew among all the signals shall be less than +/-2.5% of the clock period driven by the memory controller. All the signals of SDRAM are directly or indirectly referenced to the clock.

In this example, the normal FR4 material with a dielectric constant of 4 is used on the PCB with a differential clock rate of 1.2GHz (i.e., 833ps clock period):

Question: What is the maximum skew of the trace length for all the signals?

Answer: Max skew in time delay = +/-2.5% of the 833ps clock period = 20.825ps FR4 Er≈4, Ereff≈2.92

So, for strip lines, the maximum skew should be less than +/- (20.825/(85*SQT(4))=+/-0.1225 in = +/- 122.5 mil.

For microstrips, the maximum skew should be less than +/- (20.825/(85*SQT(2.92)) = +/-0.1433 in = +/- 143.3 mil.

Note*: Different microstrip and stripline structures will affect the signal speed, but only slightly.

Keep this information in mind the next time you’re calculating trace lengths; it should make the job a little easier for you.

–  Signal Speed and Propagation Delay in a PCB Transmission Line, Atar Mittal

Also see:

CR-8000 – PCB Design Software Overview

Click Here

CR-8000 – PCB Simulation & Analysis

Click Here

Lance Wang
Lance Wang
Solutions Architect
Lance Wang is a solutions architect in Zuken SOZO Center. He supports CR-8000 product line, mainly focusing on high-speed PCB design and signal integrity features. When not behind the keyboard or in front of customers, he is a Tom Brady fan and enjoys playing ping pong in the spare time.
  • Blog
Mai 06, 2024
Abhilfe für den Fachkräftemangel im PCB-Design durch KI

Angesichts des Fachkräftemangels in vielen Branchen finden sich immer mehr Ingenieure in Positionen wieder, die Fähigkeiten erfordern, für die sie nicht speziell ausgebildet wurden. Was wäre, wenn wir diese Lücke mit Hilfe der KI-Technologie schließen könnten? Erfahren Sie mehr.

Read now
Reuse of Schematic and Layout Modules in PCB design
  • Webinare
April 16, 2024
Effiziente Aktualisierung von abgekündigten Bauteilen in PCB-Designs

Dieses Webinar wird demonstrieren, wie das Zuken CR-8000 Enterprise PCB Design System Aktualisierungen und Neugestaltungen automatisiert, um auf die Obsoleszenz von Komponenten zu reagieren. Erfahren Sie, wie Sie betroffene Module identifizieren, Designs mit einer schematischen Modulbibliothek aktualisieren und Layout-Änderungen intelligent unterstützen.

Watch Now
  • Blog
Januar 11, 2024
Herausforderungen bei der Nutzung von Künstlicher Intelligenz für das PCB-Design

Mit der Veröffentlichung von ChatGPT ist künstliche Intelligenz zu einem Thema geworden, das viele Emotionen ausgelöst hat. In unserem Blog gehen wir der Frage nach, ob KI zur Unterstützung von Zukens Kerngeschäft, der Lösung komplexer Designherausforderungen wie PCB-Layout und Routing, eingesetzt werden könnte.

Read now
Entwurfs-Techniken für das effiziente Design von DDR4 Speicher-Interfaces
  • Blog
Dezember 05, 2023
DDR4 Design Masterclass: Entwurfs-Techniken für das effiziente Design von DDR4 Speicher-Interfaces

Die derzeit weit verbreitete DDR4 Speichertechnologie stellt in der aktuellen Technologielandschaft oft eine schwierige Herausforderung im Designprozess einer elektronischen Anwendung dar. Finden Sie heraus, was zu beachten ist.

Read now