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Resta aggiornato sulle tecnologie PCB, elettriche e di gestione dei dati

90 risultato trovato
  • Webinar
Luglio 09, 2021
PCB Design Change Workflow with CIM Database, CR-8000 and DS-CR

In this webinar, you will learn how a change request initiated in Contact Software flow through into CR-8000 and DS-CR then back to CIM Database

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Luglio 08, 2021
PCB Version Control and PLM with Zuken DS-CR and PTC Windchill

In this webinar, you will learn how a change request initiated in PTC Windchill will trigger a modification of the wiring harness design in CR-8000 and DS-CR

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  • Comunicato Stampa
Luglio 07, 2021
Zuken presenta CR-8000 2021 con funzionalità avanzate di analisi e riutilizzo di progetti

CR-8000 di Zuken ottimizza la progettazione PCB a livello di sistema con miglioramenti nella simulazione analogica, nell'analisi SI e nel layout e routing intelligente

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  • Webinar
Giugno 23, 2021
CR-8000: Creepage checking secondo gli standard IPC

Con CR-8000 Design Force 3D il check creepage ci permette di controllare che i vincoli di isolamento tengano conto delle cave nel circuito stampato in maniera chiara, veloce ed efficace.

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  • Webinar
Maggio 04, 2021
Engineering Requirements of IoT Devices

In recent years, the design of Internet of Things products became a major topic of interest. But mostly when discussing IoT aspects, the focus is on the software/application and the business-model side, neglecting the fact that PCBs are the core of - almost - every IoT device, with dedicated requirements for the design and analysis process.

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  • Webinar
Settembre 14, 2020
EMC for PCB Designers

In this presentation, an EMC minded PCB design approach is presented, allowing designers to understand which EMC rules will apply to PCB projects and how EMC analysis capabilities can be utilized in the CAD flow to reduce the risk of EMC compliance failure once the board is manufactured.

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  • Webinar
Luglio 06, 2020
Practical Signal Integrity for improved EMI Control in PCB Design

In our webinar we will provide an introduction to the challenges of signal integrity and the underlying physical effects. This will provide the basis for practical tips to address the related challenges during PCB design.

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  • Comunicato Stampa
Giugno 30, 2020
CR-8000 Release 2020

I temi chiave di sviluppo per il release 2020 di CR-8000 sono stati l’efficienza di progettazione, la progettazione e la verifica a livello di sistema ed infine il supporto per i più recenti progressi nella tecnologia dell’IC packaging.

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  • Case Study
Giugno 30, 2020
ONTEC

ONTEC faced a difficult challenge: develop a multimedia broadcasting product while complying with a customer’s electromagnetic interference requirements, all within a tight development schedule. ONTEC used Zuken’s CR-8000 with Keysight’s ADS (including SiPro) to meet the requirements of the challenge

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ONTEC uses CR-8000 to develop a next-generation product in less time despite rigorous design constraints
Giugno 07, 2020
DS-CR smart working library management

This webinar will give a brief overview of the data management platform  DS-CR and show how it can be utilized to ensure that CR-8000 libraries continue to be managed to support models of remote working.

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  • Webinar
Giugno 04, 2020
Constraint Specification in CR-8000

In this webinar the use of the Rule Stack Editor and Clearance Class in conjunction with the Constraint Browser will be explained step by step.

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Maggio 04, 2020
Advanced IC Packaging and Co-Design with Design Force
Design Force, Design Force Advanced Packaging, CR-8000
  • Case Study
Novembre 25, 2019
Testimonials - CR-8000

Una raccolta di testimonianze di clienti soddisfatti CR-8000

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Una raccolta di testimonianze di clienti soddisfatti CR-8000
  • Webinar
Novembre 18, 2019
How to be First to Market with DDR5!

DDR5 is the latest generation of memory. In this joint webinar with Keysight Technologies, we’ll begin with pre-layout simulation, then transition to CR-8000. The design will then be verified by Electromagnetic (EM) simulation and system simulations in Keysight ADS, in order to build confidence in the final DDR5 design.

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