CADSTAR SI Verify
Experience of PCB layout and design is essential.
To provide a thorough understanding of the principal functionality and uses of the SI Verify tool.
- System Overview
- The Constraint Manager interface
- Menus and toolbar options
- Preparing a design for analysis in CADSTAR SI Verify
- IBIS models, where to source them, how to import and edit
- The Circuit Model Editor
- The Scenario Editor, power functional ‘what If’ pre design engineering
- Reflection simulation
- Signal screening
- Crosstalk simulation
- Termination analysis
- Layer stack Configuration Editor
- Wave form analyser
Course Length: 2 days
For those who are new to SI Verify and its uses and functionality.