Power integrity and electromagnetic interference analysis
CADSTAR Power Integrity Advance
CADSTAR Power Integrity Advance provides fast and practical power integrity and electromagnetic interference analysis within the CADSTAR PCB design flow, offering EMI, AC and DC power analysis to help you determine the best decoupling and power distribution strategy for your layout.
Designs that utilize numerous complex high pin-count ICs such as FPGAs, DSPs and CPUs operate on multiple voltage rails, requiring careful planning of the power distribution system to minimize parasitic noise and fast switching currents that can negatively impact system performance and EMC behavior.
Power Integrity Advance provides full board EMC screening for both differential and common mode board level EMC, allowing the Layout Specialist to identify potential electromagnetic emission hotspots at an early stage and resolve them by revising component placement, routing, layer assignment and power distribution strategies.
DC Analysis creates an equivalent DC circuit of your PCB that includes model information to verify DC voltage drop and current flow, helping to identify design features such as plane splits or areas of high via density that may cause voltage drop at the target device.
AC Analysis verifies plane impedance characteristics to assist the design engineer in the planning and selection of the decoupling capacitor network, helping to optimize board real estate and determine the correct distribution of decoupling capacitor values.
Top features and benefits
- Ensure quality and integrity of the power distribution system during and after layout
- Provide full board EMC screening for differential and common mode board level EMC effects prior to production of the first prototype
- Accurate modeling of copper shapes for power delivery and noise transmission
- Simulate power distribution impedance profile over frequency and crosstalk hotspots for common mode noise
- Save cost and board space by reducing the number of decoupling capacitors
- Improve decoupling by determining correct distribution of capacitor values
- Indicate quality of placement location, value and trace/via connection
- Provide a clear graphical display of voltage and current distribution map for voltage drops and excessive current density
For full details of what is available within the CADSTAR Power Integrity Advance, download the datasheet.