Zuken Improves Team Communication and Strengthens Support for High-speed Design with CADSTAR 18
Latest version of CADSTAR available now
The new CADSTAR Redlining tool improves communication between multidisciplinary teams to help companies maintain a competitive edge and promote design quality
Quickly mark-up designs during review with CADSTAR Redlining
22 June 2017 – Munich, Germany and Westford, MA, USA – Zuken announces enhanced support for communication between multidisciplinary design teams, through the new CADSTAR Redlining markup tool.
The latest version of its CADSTAR desktop PCB design software also supports industry requirements for high-speed design, and includes across-the-board performance enhancements and ease-of-use features. One highlight is developments in the industry-leading Activ-45 router – making the routing experience even more intuitive and powerful, and giving users more control over their designs.
Redlining for speedy and accurate communication
The new CADSTAR Redlining tool improves communication between multidisciplinary teams to help companies maintain a competitive edge and promote design quality. Users can quickly mark-up designs during review and easily communicate design issues. During production, electrical engineers and PCB designers can feed back changes, such as component swaps. Redlining offers a permanent and accurate record of change activity: who carried out changes, when they happened, what was changed, and why.
To help CADSTAR 18 users test out the benefits for themselves, Zuken is offering free access to CADSTAR Redlining until 30 November.
Jeroen Leinders, CADSTAR Worldwide Sales Manager, said: “The CADSTAR Redlining tool helps companies maintain a competitive edge and promotes design quality by helping manufacturers and engineers of any discipline communicate changes as quickly and accurately as possible.”
Strengthened support for high-speed design
The via_length attribute can be set at the board, net class and net levels
Routing in single trace Activ-45: user sees flags showing which pins are swappable, allowing easy intervention during manual routing
As more applications become high-speed, requiring support for DDR3 and DDR4, it is increasingly important that via length is taken into account. To address this, the calculated minimum and maximum lengths of nets and pin pairs can now include via lengths derived directly from the layer stack. With the via length taken into account change information is communicated as early as possible to engineers managing signal integrity, so implications on impedance are considered. Improved management of net lengths means more control and accuracy is possible over signal speed for high-speed nets.
Enhanced support for high-speed design is achieved through improved accuracy in capacitance calculations for SI Verify. In turn, simulating vias more accurately ensures that board behavior more closely meets design expectations, improving design quality.
Zuken’s industry-leading Activ-45 router offers even faster and more intuitive routing, with fewer mouse clicks:
- Flags indicate which pins are swappable, which allows easy intervention during single trace manual routing.
- Layer change/via insertion includes via spiral insertion, for increased routing speed.
- Fan-out now adds teardrops during spiral via insertion, which increases the quality of the board during PCB manufacturing (also available in non Activ-45 mode).
For more information about CADSTAR 18, see www.zuken.com/cadstar
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