EMV Probleme sind in der Leiterplatten-Konstruktionspraxis oft dafür verantwortlich, dass Re-Design-Zyklen notwendig werden. Aufgrund von immer kürzer Innovationszyklen von z.B. Mobiltelefonen oder IoT Applikationen wie Fitness-Trackern und vielen weiteren Elektronikprodukten sind diese zeitintensiven Re-Design-Zyklen unbedingt zu vermeiden.
During the current COVID-19 pandemic situation, we are all experiencing changes in our day-to-day lives. While we’re all staying safe at home, we’re now also working at home. At Zuken, we’re working with customers daily to address their business needs.
Die Vorteile der Entwicklung aller Platinen eines Multi-Board Systems in einem durchgängigen System. Das so genannte Stacking von Platinen -das Stapeln von Leiterplatten als Alternative zur Verbindung über Kabeln - ist ein aktueller Trend, der die Herstellungskosten senken und die Zuverlässigkeit verbessern kann.
Double Data Rate 5 (DDR5) is the next-generation standard for random-access memory (RAM). The new specification promises to bring chips that have much higher performance than the existing DDR4 modules, as well as lower power consumption. Let us show you how you can be first to market with DDR5!
When a design requires specific minimum spacing between net classes, these clearance classes can easily be created and assigned in CR-8000 Design Gateway.
With every software release, you’ll find hundreds of enhancements, and CR-8000 Design Force 2019 is not an exception. Some are flashy and exciting, while others are, well, more utilitarian. But each and every one of them makes the product better. In this post, I’ll review my favorite 6 new routing enhancements in CR-8000 Design Force 2019.
To keep a good high-speed signal quality from driver to receiver on a PCB is not an easy task for designers. One of the most challenging issues is managing the propagation delay and relative time delay mismatches. Let me take you through the process...
Every day, more and more of our lives become connected with IoT technology. With billions of smart products already out there.
PCB design tools were built on 2D software methods in the 1980s. Many of today’s design tools still use that 2D code base. Mechanical tools have moved on to native 3D design. PCB has been stuck more or less in the 2D world. Extensions to the 2D code base made 2.5D and 3D visualization possible. But designing in 3D requires the tool to be built on a 3D kernel.
PCB designers working with advanced and complex designs are constantly pushing the boundaries to satisfy the signal integrity of routed differential pairs and busses. Those who work with flexible and flex-rigid PCB designs are perhaps the most demanding of all. A while ago, the introduction of the curved corner style for routing trunks in CADSTAR made a big difference to this group of users.
In this tech tip, we will explore how you can clear a routed trace pattern on multiple conductive layers. Watch our video to go through the steps with us.
Sometimes, engineering requirements force designers to swap the position of conductive layers in a board stackup. With CR-8000 Design Force, you can do this simply and quickly by using the Restriction/Block functions.