CR-5000 System Designer Add-On Tools

A range of add-on modules for CR-5000 System Designer are available, including:

 

 

Floor Planner

Using Floor Planner, component groups, component placement data and net/component property data can be linked within System Designer.

EDIF Converter

All major schematic design systems are supported by the EDIF converter. The tool allows for differences between various schematic design systems and recognizes expressions particular to EDIF200. Where component library data exists in System Designer, library integrity is maintained and the converter gives accurate results when used with Mentor Graphics and former Innoveda systems. The inclusion of standard ASCII I/O allows for development of interfaces with 3rd-party design tools that do not support the EDIF standard.

Boundary Scan Adviser

JTAG test support from the schematic is provided by Boundary Scan Adviser, providing test data earlier in the design process than when using conventional JTAG test methodologies. JTAG nets and quasi-JTAG nets, which connect JTAG components and non-JTAG components, can be highlighted in individual colors and the proportion of each type within the overall design can be output as a report. A JTAG dedicated netlist is produced, which automatically skips resistors, jumpers, and clusters in JTAG nets.

Data Editing

Component data and property data are easily edited in browser windows in a table format. Properties can be edited across sheets and levels while maintaining integration with the schematic. Access to the component database in real-time enables fast selection and retrieval of components and allows searching for parts by rule. Editing functions include sorting, copying, pasting, copying of components and properties, as well as text string conversion. Component properties editing works with variation/destination features and separate list files can be generated for each design variant/destination. Data is imported and exported in CSV format.

Component/Net Browser

Net property data is edited in much the same way. Design conditions, routing constraints, etc. are easily accessed and edited from the schematic. Pin property editing is also straightforward, with the facility to browse all pins for a symbol by selecting it in the schematic diagram, or browse all the pins in a net by selecting the net. 

Net List and Plotting Output

A net list processor efficiently manipulates and exports schematic data in any style defined with simple formatting language descriptions. Bills of materials can also be generated and net list formats can be defined for all types of simulators and 3rd party PCB design systems.

Templates support:

  • Board Designer NDF, RUF (all types)
  • PWS CCF, ECF, GNF
  • VISULA/CADSTAR RINF
  • EDIF200 Net list
  • Net list output for Aptix 
  • BOM output samples
  • SPICE output samples
  • VerilogHDL output samples

A plotter output tool enables sheets, circuits, levels, and whole hierarchies to be specified for batch output, and when printing, time stamps, user names, level locations, and page data can be automatically plotted. A wide range of output formats, including HP-GL, HP-GL2, and Post-Script are supported. High quality plots can be sent to Windows™ printer drivers without special configuration.

Design Comparison

To assist with design changes, a schematic design comparison tool finds differences between schematics before and after modification. The results can be checked visually in the schematic diagram.

Spacing Synthesizer

Spacing Synthesizer is a 2D and 3D routing checker for high voltage PCBs, cutting typical design time by six weeks. This tool enables engineers to assign groups of signals and the distance between signals of the same or a different group, from within the system schematic during the design process. The signal groups can then be visualized in different colors within System Designer. A distance matrix is automatically created showing the design rules required in Board Designer, the board layout module of CR-5000.

Using the Spacing Synthesizer, net groups are assigned to signals in System Designer, where they are distinguished by color coding. Spacings are easily defined, both within each net group and between groups, and design rule checks (DRCs) are automatically generated to ensure that the required spacings are maintained throughout the board design process. The same color coding transfers into the Board Designer layout tool within CR-5000. Both 2D and 3D DRC is then carried out to pinpoint potential conflict areas and enable rapid correction of the layout.