Analog Simulation & Verification
A range of Analog Simulation & Verification are available, including:
Analog Designer
Analog Designer is an analog simulation environment with System Designer. It is simple to operate, supports numerous Spice2G6 and other simulators and allows for the control and use of test waveforms from HP VEE and LabView test equipment. Analog Designer improves design flexibility through various utilities, references, RLC constants and polarity-based pin placements etc. Standard features include a pin table resource editor, automated model search and updating, net list creation, a simulation manager, and operating point voltage display dialog for Star-HSpice and PSpice simulation models. The device model library includes over 4000 models for discrete devices and ICs.
CR-5000/Saber Integrated Platform
The design of mechatronic systems requires both integrating multiple technologies in a single system and combining software control with mechatronic functions, while constantly verifying design performance at board, subsystem, and system levels.
Enabling concurrent design and verification at the board level, the growing complexity of PCBs for mechatronic systems, merging both analog and digital functional blocks and using programmable devices, requires sophisticated simulation and analysis capabilities to ensure accurate and reliable performance prior to production, in particular the co-simulation of components modeled as diverse as in MAST, SPICE, VHDL, Verilog or C-code.
Zuken and Synopsys have integrated their respective PCB design and simulation solutions, CR-5000 and Saber, into a common PCB design and verification platform. Synopsys Saber delivers the simulation, modeling and analysis capabilities needed for the concurrent PCB design and verification for mechatronic systems. A full system level design and verification environment featuring the combined strength of CR-5000 and Saber enables a smooth flow from single-entry design definition, via native simulation and interactive analysis, to back-annotation of results.