This overview shows you a small selection of all Key Enhancements in CADSTAR 10.0.
For the full details go to the "What's new in CADSTAR 10.0" documentation.
| Function | Description & Benefit |
|---|---|
|
CADSTAR FPGA |
A new integration with the Active-HDL Lite FPGA design environment from Aldec is available as an additional cost option with CADSTAR. |
|
CADSTAR E3.logic |
An integration has been developed which supports initial design transfer from E3.logic to CADSTAR, forward and back-annotation of design changes and cross-probing. CADSTAR will also access the E3 database directly to access library part information. |
|
Version control of Parts and Components in Library, Schematic and PCB design |
Updates to version information can be handled automatically and comparisons between the versions used in the library and current design can be easily be made. Fully detailed reports are also available. You even may easily select to update all ‘out of date’ parts in a design to match the latest available in the library. |
|
Parts information stored in the Schematics and PCB design files |
Parts information stored in the Schematics and PCB design files
|
|
Rules By Area |
Design Rules by Area are now supported in Design Editor and will allow you to define specific rules per area in a consistent manner with P.R.Editor |
|
Intelligent Buses in Schematics |
Restrict the signals connecting to a bus according to the signal name. When a symbol with multiple terminals is moved so that the terminals are superimposed over a bus, a new connection for each terminal can be connected to the bus. A 'Bus Terminal' is added to each new connection at the point where the connection meets the bus. |
|
Multiple Net Highlight Colours |
Highlight colours can now be defined per-net. Net highlighting can be toggled via the right mouse button menu. Teardrops and test lands are also highlighted in the PCB. |
|
Parts Library in Design Editor |
Part information is stored in the Schematics and PCB design files. Create a Parts Library from the design. |
|
ODB++ |
Numerous enhancements have been made to the ODB++ output, like: All component copper is written out: export of Component outlines on resist layers. |
