Zuken CADSTAR / Aldec Active-HDL simulator is now part of the Altera standard handbook
- News Flash
CADSTAR FPGA (the combination between Aldec’s Active-HDL Lite design simulation environment and Zuken’s desktop PCB design suite, CADSTAR) is now part of the Altera standard handbook for using Active-HDL with Altera designs, allowing the pcb engineers to perform comprehensive FPGA designs with complete support for technology from this FPGA vendors.
More information on this support is in chapter 5 of Altera’s handbook.