Zuken Engineering Day UK

Agenda

Quick Links

Prepation for this year's local conference for all Zuken users and interested parties is well underway. Check out the agenda  now!

TimeStream 1:
E³.series
Stream 2:
CADSTAR
Stream 3:
CR-5000
9.30 - 10.00

Coffee and registration

10:00 - 10:30

Introduction and Zuken Update, Including Product Overview
Reiner Duwe & Steve Chidester

10:30 - 11.15

Promoting Innovation in UK Business
Myrddin Jones, Deputy of Technology at Technology Strategy Board

11:15 - 11.30

Coffee break

11:30 - 12:15

The Importance of Building and Maintaining Skills
Darren Race, Semta

12.15 - 13:00

E³.series Roadmap
Steve Chidester

CADSTAR Roadmap
Jeroen Leinders

CR-5000 Strategic Outlook with System Planner Introduction
Nik Kontic

13:00 - 14:30

Lunch

14:30 - 15:00

Liebherr E³. series Case Study
Ulrich Prottung

BoardModeler Lite - 3D Model Wizards
David Wilkinson

Panasonic Virtual PCB Design Office - Design for Offshore Manufacturing
Andrew Drysdale and Paul Jones, Panasonic

15:00 - 15:30

Wire Harness Testing
Jason Evans, MK Test

Tutorial SI Principles
John Berrie

15:30 - 16:00

Coffee Break

16:00 - 16:30

E³.Revision Management
Ulrich Prottung

DDR2 in CADSTAR Masterclass Part 1
Keith Watkins and Bob Sadowski

Shared Design & Design Reuse
Brian Morris and Nik Kontic

16:30 - 17:00

E³.Functional Design Overview
Tim Brown

DDR2 in CADSTAR Masterclass Part 2
Keith Watkins and Bob Sadowski

Tutorial: Applying in constraints in CR-5000, a practical approach
Brian Morris and Nik Kontic

17:00 - 17:15

Drinks and Refreshments

 

Abstracts  

Promoting Innovation in UK Business

During this session Myridd Jones, the deputy of technology at the Technology Strategy Board will look at the importance for innovation for the UK and UK companies, the funding opportunities in the UK and Europe for innovative R&D, plus the importance of networking and sharing information and finding collaboration partner. He will also focus on case studies of companies working in the electrical and electronic design industry that have worked together with customers and academy to push the boundaries of innovation to solve major technical and cost challenges.

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Panasonic Virtual PCB Design Office - Design for Offshore Manufacturing 

Providing electronic data to their Global R&D offices and off shore factory engineering teams towards delivery high quality DFM & DFT for High volume Rocket Launch requirements.

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Wire Harness Testing 

Product testing is a vital element of the production process. Developments in design tools and automatic data handling mean that the implementation of Automatic Test Equipment is more feasible than ever. Whether you are producing high volumes or low quantity batches, whether your product is a relatively simple harness or the most complex electro-mechanical assembly, today’s software tools and the collaborative development efforts made by design tool suppliers, data management teams, and test system manufacturers offer manufacturers a simpler route to ensuring product quality. Following on from last year’s presentation, this session will look again at the progression of automatic wire harness testing, examining how the technology has progressed to make the process simpler while ensuring relevant and reliable results.

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Shared Design & Design Reuse 

A brief tutorial in team based PCB Layout and design IP reuse focusing on native features available to all CR-5000 users. Introducing users to some of the higher level functions within CR-5000, with the aim of increasing productivity and quality.

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Tutorial: Applying in constraints in CR-5000, a practical approach 

Offering guidance on the best way to implement some of the more common electrical constraints within the CR-5000 environment.

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Tutorial: SI Principles 

Signal Integrity is the quality of a signal as transmitted from one place to another, in our case along PCB tracks. Perfect signal integrity means the signal is received undistorted. Most modern digital or part-digital PCBs will only function correctly if you design signal integrity directly into the PCB layout.
Not surprisingly, super-fast buses such as PCI Express and HyperTransport require signal integrity control; but so do all PCBs containing double data rate (DDR) memory, USB ports, PCI buses or high-range FPGAs, to name just a few. In this jargon-free session, well-published signal integrity specialist John Berrie will present the basics of signal integrity control for PCB design.

The techniques he will cover can be applied up to the very latest technology:

  • How PCB signals become distorted
  • Single-ended and differential impedance
    - What they are
    - How to control them
  • Terminations
    - How they work
    - New versus traditional methods
  • Routing PCI Express (PCIe), HyperTransport and other super-fast LVDS buses

It is even possible that by attending this short session, you could gain an insight that helps you avoid a design spin.

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DDR2 in CADSTAR Masterclass

Quadra Solutions will be presenting a DDR2 CADSTAR masterclass which will focus on the practical requirements that must be achieved when placing and routing a PCB design incorporating DDR memory. The presentation will incorporate layer stack and impedance planning, floorplanning, routing topologies and constraints, all of which are key to successful DDR routing.

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